SciFed Materials Research Letters

Temperature and Frequency Independent Readout Circuit for PCS System

SciFed Materials Research Letters

Temperature and Frequency Independent Readout Circuit for PCS System

Research Article

Received on: September 15, 2017, Accepted on: September 19, 2017, Published on: October 03, 2017

Citation: Pawan Whig (2017) Temperature and Frequency Independent Readout Circuit for PCS System . SF J Material Res Let 1:3.

Copyright: ©2017 Pawan Whig. This is an open-access article distributed under the terms of the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original author and source are credited.

  • Author

    Pawan Whig

    Vivekananda Institute of Professional Studies
    India

Abstract

Abstract
        In this paper, we propose a novel readout circuit that allows Photo Catalytic Sensor (PCS) arrays to operate without temperature stabilisation. This approach can improve calibration to a very wide range without the use of a high speed digital processor. This study is based on simulation of power consumption, temperature stabilisation, and frequency compensation technique of readout Circuit. The circuit consists of PCS sensor block, bias current generation, offset correction circuit, voltage follower. In this novel design, the device is free from channel length modulation and is seen consuming low power of the order of 600 μW. The stability analysis using nyquist and bode plots reveals that there is an improvement in the phase margin by 30% approximately. This device has a simple architecture, and hence very suitable for the water quality monitoring application.

Keywords
         PCS Sensor; Nyquist; Bode Plot; Sensor

Fulltext

Introduction
          Semiconductor materials have become more attractive largely because they offer a higher temperature coefficient of resistance than the other materials detectors [1]. The resistance of semiconductor materials can be shown to have the form 

                                                             R =R o T-3/2 e b/kt                                                               (1)

        Where Ro and b are constants and are determined by physical properties of semiconductor. Variation in the PCS properties result in a change of the Ro and b in the array elements and consequently the PCS sensor have different resistance slopes against different operating temperature [2]. Thus a temperature stabilisation circuit is needed.

        In Urban water supply system, the water quality determining indices such as O2, pH value and turbidity are monitored continuously. When the indices exceed the limiting value, the system will effectively handle the treatment against deterioration ensuring the safety of water. Water is vital for all known forms of life. Many research works have contributed to design water quality measuring devices. But it has always been a challenge to find a more precise and accurate device for monitoring the quality of water.

        The use of micro sensors for infield monitoring of environmental parameters is gaining interest due to their advantages over conventional sensors [3, 4, 5, 6, 7]. In the field of micro sensors for environmental applications, photo catalytic Sensor (PCSs) has proved to be of special application. They are particularly helpful for measuring O2 and other ions in small volumes and they can be integrated in compact flow cells for continuous measurements and monitoring [8, 9, 10, 11, 12].

        This study highlights the performance analysis of technique which has been used to monitor the quality of water using a low power interface circuit based on PCS. The basics of study focus on low power consumption readout circuit that maintains a constant bias potential between the reference and the PCS using voltage follower circuit, Wilson current mirror, and one operational trans conductance amplifier (OTA).

         The paper is organised as follows: Section II describes the Semiconductor Photo catalysis, Section III explains the device description and its mathematical model [13], Section IV includes the observations, Section V gives the results and conclusions and Section VI presents the future works to be done.

Semiconductor Photo Catalysis
         Semiconductor photo catalysis is a process of detoxify toxic organic pollutants by the use of ultra violet or visible radiation [14, 15, 16, 17]. These radiations are used to create electron/hole pairs in semiconductor which further helps in photo catalysis phenomenon as shown in Figure 1. The electron produce as a result of phenomena then reacts with oxygen in the sample to form O2- and hole reacts with surface hydroxyl groups to form OH. Radicals. The radical species then attack the organic molecule and oxidized the organic molecules into Carbon dioxide and Water. Also, it will produce HCL if the organic molecule contains chlorine.

Figure 1: Diagram to Show Photocatalysis

         The three main indices used to assess this organic pollution in aqueous medium are Chemical oxygen demand (COD), biological oxygen demand (BOD) and total organic carbon (TOC). BOD analysis is used to estimate biodegradable part of the pollutants [18]. TOC analysis is valid for soluble organic compounds. The COD analysis shows the amount of oxygen needed to oxidize the organic pollutants. Out of all the three major indices discussed above COD has the advantage of speed and simplicity However, the conventional COD procedure is very time consuming, and it require high-quality expensive or poisonous reagents. In conventional COD procedures, a known amount of oxidant is added to a sample and the mixture is boiled. After the oxidation has proceeded for a given period of time, the initial concentration of organic species can be calculated by determining the amount of remaining oxidizing agent.

          Photo catalysis is an efficient method for the degradation of organic compounds. A semiconductor material has a filled valence band separated from a vacant conduction band by a gap called band gap E g . When light having energy more than band gap falls on the semiconductor material, an electron is excited from the valence band to the conduction band, leaving behind a positive hole. On the way to the surface, the electron would reduce any available organic molecule. In contrast, when the hole reaches the surface, it would react with water to produce hydroxyl radicals, which helps in oxidizing organic pollutants. Many of photo catalytic processes apply the TiO2 as a photo catalyst because it is non-photo corrosive, non-toxic, and capable of the photo oxidative destruction of most organic pollutants. The COD of a given sample can be calculated, by noticing the change of the dissolved oxygen concentration under photo catalytic conditions. The objective of this study was to develop a simple, fast, inexpensive, and safe photo catalytic sensor for COD using the photo catalysis of TiO2. The technique is based on the measurement of changes in oxygen concentration resulting from photo catalytic oxidation of organic compounds.

PCS Macro Model
            The PCS is in fact a MOSFET with the gate connection separated from the chip in the form of a reference electrode inserted in an aqueous solution which is in contact with the gate oxide. The general expression for the drain current of the MOSFET and thus also of the PCS in the non-saturated mode is


                    (1)


           Where Cox is the oxide capacity per unit area, µ is the electron mobility in the channel, W and L the width and the length of the channel, respectively. The drain current Id is a function of the input voltage V gs only when the geometric sensitivity parameter β = µCoxWgs/L, as well as the applied drain source voltage Vds and the threshold Vt are constant. Thus, Vgs is the only input variable. Defining the metal connection of the reference electrode as a remote gate inserted in an aqueous solution, suggests that any interfacial potential in the input circuit should be described in terms of Vt. Therefore, the second important MOSFET equation is that of the threshold voltage:

                                                                    (2)                                                            

        Where the first term reflects the difference in work function between the gate metal (ΦM)and the silicon  (Φsi) , the second term is due to accumulated charge in the oxide (Qox), at the oxide-silicon interface (Qss) and the depletion charge in the silicon (QB), whereas the last term determines the onset of inversion depending on the doping level of the silicon. All terms are purely physical in nature.

          In case of the PCS, the same fabrication process can be used, resulting in the same constant physical part of the threshold voltage. However, in addition to this, there are two or more contributors first the constant potential of the reference electrode E ref, second the interfacial potential Ψ+ χsol at the solution/oxide interface of which Ψ is the chemical input parameter, shown to be a function of the solution O2 and χsol is the surface dipole potential of the solvent and thus having a constant value. Hence the expression for the PCS threshold voltage becomes

             (3)


        In case the PCS is treated as a MOSFET and connected to a curve tracer with the reference electrode connected to the Vgs port, Id/Vds curves can be recorded as function of Vgs as is usually done with MOSFETs. However, with the reference electrode connected to the source (Vgs = 0) similar curves can be achieved by changing the COD of the solution. This is shown in Figure 2 and Figure 3. The effect shown in Figure 9 is due to the relation Ψ = f (Oxygen). From the experiment described above and with the theoretical description as given in Eqs. (2) and (3) in mind, it may be concluded that a PCS is electronically identical to a MOSFET and can thus still be seen as an electronic device, with one additional feature: the possibility to chemically modify the threshold voltage via the interfacial potential at the electrolyte/oxide interface.

Figure 2: Id/Vds Curves can be Recorded as Function of Vgs
  
Figure 3: Id/Vds Curves when the Reference Electrode Connected to the Source (Vgs= 0)
 
Device Descriptions and Mathematical Modelling
            The basic structure of the device consists of four major parts Fig. 4 shows the Block diagram of the proposed CMOS readout circuit, which consists of PCS sensor array, a bias current generation block, an offset correction circuit, and an output stage. The block diagram of device is given as

Figure 4: Block Diagram of the Device
  

Bias Current Generation Block
           In the bias current generation block, M1 MOS transistor is connected with the two resistors Rs and Rd which make the device to operate against temperature variations as shown in Figure 5. In this block we used a biasing arrangement with the help of one MOSFET and two resistors R s and R d the experiments with the typical values i.e., for Rs =2Kohm and Rd =25 Kohm has been performed and the bias current thus generated is found to be constant. Let us assume, with increase in the temperature the resistance gets varies and due to which I bias get change.

Figure 5: Circuit Diagram of Bias Current Generation Block
  

          An improved bias arrangement circuit is shown above on applying KVL around the indicated loop we get 
V dd = Id Rd +Ig Rg +Vgs+Is Rd
Since I g~0
Therefore, Id~I
Putting the above conditions into the equation, we get
V dd= Id Rs+Vgs +IdRd
I d=Vdd-Vgs/Rs+Rd

            Let us suppose, if temperature increases the value of R d also increases hence the voltage at the point A will decrease which in turn decrease the value of Vgs , Hence the Current Ibias is remains same. Also if input current increases due to temperature variations the voltage increases at point A due to which Vgs increases and we obtain the unchanged Ibias. Thus, this circuit eliminates the requirement of two dc supplies. A resistor Rs known as bias resistor is also connected to the source leg. This resistance acts as negative feedback and hence stabilizes the current I s or I d. hence we have design a circuit which is free from variations due to temperature changes. This circuit is fairly simple and requires inexpensive components.

Offeset Correction Circuit
            Detector voltage Vd is shown as

                                                                                                                             (4)    

           When M 4 and M3 are on, and then voltage Vd is sampled on the capacitor C1 when the reset switch is on. When M 4, M3 and reset switch are off we subtracted the output signal Vskim-Vd and amplified the signal by the ratio of C 1/C2 when the skimming switch was on as shown in the circuit diagram. This process reduces the offset level and provides the signal amplification. The output of amplifier A2 is buffered by amplifier A3 and we get the final output as

                                                               (5)
                                   

Circuit Diagram of the Device
        The circuit diagram of the device consisting of four blocks as discussed above is shown below.

        In the above circuit the bias current which derives the PCS is kept constant with the help of bias current generation block, which make the device more stabilize with the temperature variations. OTA compares the Vin and V ref signal from the PCS and generates the output signal proportional to the difference of the two voltages. The output passes through the current mirror which consists of M1 and M2, since both operate in saturation and hence the drain current is function of Vgs only. However, considering the effect of channel length modulation, Vds causes some difference in their drain currents. In order to improve this mismatch, a cascade current mirror is used. The advantage of virtually eliminating the base current mismatch of the conventional current mirror, thereby insuring I mirror =I in. Also by addition of fourth transistor to the willson current mirror improves its linearity at high current levels. One significant advantage of current mirror is its very high input impedance.

Figure 6: Circuit Diagram of Proposed Readout Circuit

Figure 7: Equivalent Circuit of Device without Frequency Compensation  
  
             The proposed readout circuit is shown in which the output of the PCS sensor is fed into one of the terminal of the voltage follower, which helps from the loading effect and keeping the voltage level constant irrespective of the change in the current value .This practise increases the sensitivity of the sensor, and even a very small value can be observed at the output.


        Under ideal condition the OPAM R i = infinite and thus Vo =V in.
        The transfer function for the circuit given above is calculated as
        Ix=gmo(VA- Vin) Where gm0 is trans conductance.

                                                          (7)

Put (1) into (2) we get

                                    (8)

                         (9)
                              
We know

                                                                                   

but Vgs =Vx

Therefore, Vo/Vx =-gmZD
Vo =-gmZD Vx Where gm is trans conductance of FET
Putting the value of (8) in (9) we get,

 , Where VA =R2/R12      (10)

Putting the value of VA in (10), we get


Using Typical Values of gm=20ms/um gmo=10s/um R 1=R2 =10k Rp=10k Cb=1pf we get,G=8*108/[s2(4*10-6)+500s+2*108]

                                                 Approx                                             (11)      
                          
         The Bode and nyquist plot of the above transfer functions are plotted and the phase margin of 120 degree is observed as follows:

          Since the readout circuit has feedback connections. Hence the circuit needs enough phase margins to prevent oscillations in the output of sensor.

           For minimising oscillation, frequency compensation is needed. The circuit of the device without using frequency compensation circuit is shown below.

           In the above circuit R f and Cf is placed in parallel with the Sensor model and the optimised value of Cf and R f is calculated using maxima minima technique as shown below.

           Let, Rf and Cf be added in parallel with the sensor as shown in the figure Gain new (Gn) = 1+sCfRf/(502-20Cf- 5Cf Rf )+s(5+2000Cf+502CfRf)

        On differentiating the Gn w.r.t Cf We get the optimum value for R f as

                                       Rf =2000s-20/5+10s                                                     (12)

        On differentiating the Gn w.r.t Rf we get the value for Cf as

                                        C f=1+s2/4s (1-100s)                                                         (13)

        The transfer function of this new circuit is calculated and bode plot and nyquist plot of the circuit is plotted and it is observe that there is increase in phase margin by 50 degree.

        The specifications of the readout circuit are given in the Table 1 as follows,

Figure 8: Simulation Result of Bode Plot & Nyquist Plot Transfer Function (11)
 
 
Figure 9: Modified Circuit of Device using Frequency Compensation 

Figure 10: Simulation Result of Bode Plot & Nyquist Plot of Modified Circuit 

Figure 11: Simulation Result Output Wave form of the Device with using Rand Cf    

Figure 12: Simulation Result Output Wave form of the Device without using Rf and Cf
  
Table1: Specifications of the Readout Circuit  

Table 2: Compilation of the Result Obtained 

Results and Conclusions
           In this novel design, the device can operate without temperature stabilisation, free from channel length modulation and is seen consuming low power of the order of 600 µW also frequency compensation by stability analysis using nyquist and bode plots reveals that there is an improvement in the phase margin by 30% approximately. This device has a simple architecture, and hence very suitable for the water quality monitoring application. A significant advantage of this design is that, this circuit is insensitivity to the body effect as demonstrated in this circuit. This study can be extended and more improvement in terms of power and size can be achieved at wiring and layout characteristics level and more effective results can be obtained.

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